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| HD74AC123A Dual Retriggerable Resettable Multivibrator REJ03D0245-0200Z (Previous ADE-205-365 (Z)) Rev.2.00 Jul.16.2004 Description Each half of the HD74AC123A features retriggerable capability, complementary dc level triggering and overriding Direct Clear. When a circuit is in the quasi-stable (delay) state, another trigger applied to the inputs (per the Truth Table) will cause the delay period to start again, without disturbing the outputs. By repeating this process, the output pulse period (Q High, Q Low) can be made as long as desired. Alternatively, a delay period can be terminated at any time by a Low signal on CD, which also inhibits triggering. An internal connection from CD to the input gate makes it possible to trigger the circuit by a positive-going signal on CD, as shown in the Truth Table. For timing capacitor values greater than 1000 pF, the output pulse width is defined as follows. Where tw is in ns, RX is in k and CX is in pF. tw = RXCX Features * Outputs Source/Sink 24 mA * Ordering Information Part Name HD74AC123AP Package Type DIP-16 pin Package Code Package Abbreviation Taping Abbreviation (Quantity) DP-16E, -16FV FP-16DAV P FP RP -- EL (2,000 pcs/reel) EL (2,500 pcs/reel) HD74AC123AFPEL SOP-16 pin (JEITA) HD74AC123ARPEL SOP-16 pin (JEDEC) FP-16DNV Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. Pin Arrangement A1 1 B1 2 CD1 3 Q1 4 Q2 5 CX2 6 RX2CX2 7 GND 8 (Top view) 16 VCC 15 RX1CX1 14 CX1 13 Q1 12 Q2 11 CD2 10 B2 9 A2 Rev.2.00, Jul.16.2004, page 1 of 6 HD74AC123A Logic Symbol 76 (15) (14) R XC X CX Q 9(1) A 10(2) B Q CD 12(4) 5(13) 11 (3) VCC = Pin16 GND = Pin8 Pin Names A1, A 2 B1, B2 CD1, CD2 Q1, Q2 Q1, Q 2 Trigger Inputs (Active Falling Edge) Trigger Inputs (Active Rising Edge) Direct Clear Inputs (Active Low) Positive Pulse Outputs Negative Pulse Outputs Triggering Truth Table Inputs A X X L H H L L H: L: X: : : High Voltage Level Low Voltage Level Immaterial Low-to-High Transition High-to-Low Transition H B L X H X H CD Response No trigger No trigger Trigger No trigger Trigger Trigger Rev.2.00, Jul.16.2004, page 2 of 6 HD74AC123A Absolute Maximum Ratings Item Supply voltage DC input diode current DC input voltage DC output diode current DC output voltage DC output source or sink current DC VCC or ground current per output pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC, IGND Tstg Ratings -0.5 to 7 -20 20 -0.5 to Vcc+0.5 -50 50 -0.5 to Vcc+0.5 50 50 -65 to +150 Unit V mA mA V mA mA V mA mA C Condition VI = -0.5V VI = Vcc+0.5V VO = -0.5V VO = Vcc+0.5V Recommended Operating Conditions Item Supply voltage Input and output voltage Operating temperature Input rise and fall time (except Schmitt inputs) VIN 30% to 70% VCC Symbol VCC VI, VO Ta tr, tf Ratings 2 to 6 0 to VCC -40 to +85 8 V V C ns/V VCC = 3.0V VCC = 4.5 V VCC = 5.5 V Unit Condition DC Characteristics Item Symbol VIH Vcc (V) 3.0 4.5 5.5 VIL 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 VOL 5.5 3.0 4.5 5.5 3.0 4.5 Input leakage current Dynamic output current* IIN IOLD IOHD 5.5 5.5 5.5 5.5 min. 2.1 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.58 3.94 4.94 -- -- -- -- -- -- -- -- -- Ta = 25C typ. 1.5 2.25 2.75 1.50 2.25 2.75 2.99 4.49 5.49 -- -- -- 0.002 0.001 0.001 -- -- -- -- -- -- max. -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.32 0.32 0.32 0.1 -- -- Ta = -40 to +85C min. 2.1 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.48 3.80 4.80 -- -- -- -- -- -- -- 86 -75 -- max. -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.37 0.37 0.37 1.0 -- -- 220 A mA mA A V VOUT = 0.1 V or VCC -0.1 V Unit Condition Input Voltage V VOUT = 0.1 V or VCC -0.1 V Output voltage VOH VIN = VIL or VIH IOUT = -50 A VIN = VIL or VIH IOH = -12 mA IOH = -24 mA IOH = -24 mA VIN = VIL or VIH IOUT = 50 A VIN = VIL or VIH IOL = 12 mA IOL = 24 mA IOL = 24 mA VIN = VCC or GND VOLD = 1.1 V VOHD = 3.85 V VIN = VCC or ground Quiescent supply 5.5 -- -- 130 ICC current *Maximum test duration 2.0 ms, one output loaded at a time. Rev.2.00, Jul.16.2004, page 3 of 6 HD74AC123A AC Characteristics: HD74AC123A Ta = +25C CL = 50 pF Item Propagation delay A or B to Q Propagation delay A or B to Q Propagation delay CDn to Q Propagation delay CDn to Q Note: Symbol VCC (V)*1 Min tPLH 3.3 1.0 tPHL tPLH tPHL 5.0 3.3 5.0 3.3 5.0 3.3 5.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Typ -- -- -- -- -- -- -- -- Max 19.0 15.0 19.0 15.0 15.0 12.0 15.0 12.0 Ta = -40C to +85C CL = 50 pF Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 22.0 17.0 22.0 17.0 18.0 13.5 18.0 13.5 Unit Condition ns Cext = 0 pF Rest = 5 k ns ns ns 1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V AC Operating Requirements: HD74AC123A Ta = +25C CL = 50 pF Item Pulse width A or B or CDn Recovery time Symbol VCC (V)*1 tw 3.3 -- trec 5.0 3.3 -- -- Typ Ta = -40 to +85C CL = 50 pF Unit Condition ns Cext = 0 pF Rext = 5 k ns Guaranteed Minimum 5.0 7.0 4.5 2.0 2.0 5.0 2.0 2.0 5.0 -- CDn to A or B Note: 1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V Ta = +25C CL = 50 pF Item Output pulse width Minimum output Symbol VCC (V)*1 Min TWQ 3.3 -- TWQ(min) 5.0 3.3 0.90 190 Typ -- -- -- Max -- 1.10 350 Ta = -40C to +85C CL = 50 pF Min -- 0.85 170 Max -- 1.15 380 Unit Condition ms Cext = 0.1 F ns Rext = 10 k Cext = 28 pF pulse width 5.0 160 -- 300 140 330 Rext = 2 k Note: 1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V Cext and Rext should be connected as close to the IC terminals as possible, in order to prevent malfunction. Rev.2.00, Jul.16.2004, page 4 of 6 HD74AC123A Package Dimensions As of January, 2003 Unit: mm 19.2 20.32 Max 16 9 6.3 7.4 Max 1 0.89 1.3 8 2.54 Min 5.06 Max 7.62 0.51 Min 2.54 0.25 0.48 0.1 0.25 - 0.05 0 - 15 Package Code JEDEC JEITA Mass (reference value) DP-16E Conforms Conforms 1.05 g + 0.1 Unit: mm 19.2 20.32 Max 16 9 6.3 7.4 Max 1 0.89 1.3 8 2.54 Min 5.06 Max 7.62 0.51 Min 2.54 0.25 *0.48 0.08 *0.25 0.06 0 - 15 Package Code JEDEC JEITA Mass (reference value) DP-16FV Conforms Conforms 1.05 g *NI/Pd/AU Plating Rev.2.00, Jul.16.2004, page 5 of 6 HD74AC123A As of January, 2003 10.06 10.5 Max 16 9 5.5 Unit: mm 1 *0.20 0.05 8 0.80 Max 2.20 Max 0.20 7.80 + 0.30 - 1.15 1.27 0.10 0.10 0 - 8 0.70 0.20 *0.40 0.06 0.15 0.12 M Package Code JEDEC JEITA Mass (reference value) FP-16DAV -- Conforms 0.24 g *Ni/Pd/Au plating As of January, 2003 Unit: mm 9.9 10.3 Max 16 9 3.95 1 1.27 0.635 Max 8 0.11 0.14 + 0.04 - 1.75 Max *0.20 0.05 0.10 6.10 + 0.30 - 1.08 0 - 8 + 0.67 0.60 - 0.20 *0.40 0.06 0.15 0.25 M *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) FP-16DNV Conforms Conforms 0.15 g Rev.2.00, Jul.16.2004, page 6 of 6 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. 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